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Tuesday 17 September 2013

c-dac exam papers,c-dac microprocessor exam papers,microprocessor study materials,

Center for Development OF Advanced Computing
Objective Type Questions
C-DAC Microprocessor & Micro-Controller

Q.1.If the crystal oscillator is operating at 15 MHz, the PCLK output of 8284 is
  • 2.5 MHz.
  • 5 MHz.
  • 7.5 MHz.
  • 10 MHz.
Q.2.In which T-state does the CPU sends the address to memory or I/O and the ALE signal for de-multiplexing
  • T1.
  • T2.
  • T3.
  • T4.
Q.3.If a1M1× DRAM requires 4 ms for a refresh and has 256 rows to be refreshed, no more than __________ of time must pass before another row is refreshed.


  • 64 ms.
  • 4 ns.
  • 0.5 ns.
  • 15.625
Q.4.In a DMA write operation the data is transferred
  • from I/O to memory.
  • from memory to I/O.
  • from memory to memory.
  • from I/O to I/O.
Q.5.Which type of JMP instruction assembles if the distance is 0020 h bytes
  • near.
  • far.
  • short.
  • none of the above.
Q.6.A certain SRAM has 0CS=,0WE=and1OE=. In which of the followingmodes this SRAM is operating
  • Read
  • Write
  • Stand by
  • None of the above
Q.7.Which of the following is true with respect to EE PROM?
  • contents can be erased byte wise only.
  • contents of full memory can be erased together.
  • contents can be erased using ultra violet rays
  • contents can not be erased
Q.8.Pseudo instructions are basically
  • false instructions.
  • instructions that are ignored by the microprocessor.
  • assembler directives.
  • instructions that are treated like comments.
Q.9.Number of the times the instruction sequence below will loop before coming out of loop is MOV AL, 00hA1: INC AL JNZ A1
  • 00
  • 01
  • 255
  • 256
Q.10.What will be the contents of register AL after the following has been executed MOV BL, 8C MOV AL, 7E ADD AL, BL
  • 0A and carry flag is set
  • 0A and carry flag is reset
  • 6A and carry flag is set
  • 6A and carry flag is reset
Q.11.Direction flag is used with
  • String instructions.
  • Stack instructions.
  • Arithmetic instructions.
  • Branch instructions.
Q.12.Ready pin of a microprocessor is used
  • to indicate that the microprocessor is ready to receive inputs.
  • to indicate that the microprocessor is ready to receive outputs.
  • to introduce wait states.
  • to provide direct memory access.
Q.13.These are two ways in which a microprocessor can come out of Halt state.
  • When hold line is a logical 1.
  • When interrupt occurs and the interrupt system has been enabled.
  • When both (A) and (B) are true.
  • When either (A)or (B) are true.
Q.14In the instruction FADD, F stands for
  • Far.
  • Floppy.
  • Floating.
  • File.
Q.15.SD-RAM refers to
  • Synchronous DRAM
  • Static DRAM
  • Semi DRAM
  • Second DRAM
Q.16.In case of DVD, the speed is referred in terms of n X (for example 32 X). Here, X refers to
  • 150 KB/s
  • 300 KB/s
  • 1.38 MB/s
  • 2.4 MB/s
Q.17.Itanium processor of Intel is a
  • 32 bit microprocessor.
  • 64 bit microprocessor.
  • 128 bit microprocessor.
  • 256 bit microprocessor.
Q.18.LOCK prefix is used most often
  • during normal execution.
  • during DMA accesses
  • during interrupt servicing.
  • during memory accesses.
Q.19.The Pentium microprocessor has______execution units.
  • 1
  • 2
  • 3
  • 4
Q.20.EPROM is generally erased by using
  • Ultraviolet rays
  • infrared rays
  • 2 V electrical pulse
  • 24 V electrical pulse
Q.21.Signal voltage ranges for a logic high and for a logic low in RS-232C standard are
  • Low = 0 volt to 1.8 volt, high = 2.0 volt to 5 volt
  • Low =-15 volt to –3 vol, high = +3 volt to +15 volt
  • Low = +3 volt to +15 volt, high = -3 volt to -15 volt
  • Low = 2 volt to 5.0 volt, high = 0 volt to 1.8 volt
Q.22.The PCI bus is the important bus found in all the new Pentium systems because
  • It has plug and play characteristics
  • It has ability to function with a 64 bit data bus
  • Any Microprocessor can be interfaced to it with PCI controller or bridge
  • All of the above
Q.23.Which of the following statement is true?
  • The group of machine cycle is called a state.
  • A machine cycle consists of one or more instruction cycle.
  • An instruction cycle is made up of machine cycles a nd a machine cycle ismade up of number of states.
  • None of the above
Q.24.8251 is a
  • UART
  • USART
  • Programmable Interrupt controller
  • Programmable interval timer/counter
Q.25.8088 microprocessor has
  • 16 bit data bus
  • 4 byte pre-fetch queue
  • 6 byte pre-fetch queue
  • 16 bit address bus
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